Register usage for 64 bit PowerPC

The register usage for PPC64 is given in Table 6.


Table 6: Register usage for 64-bit PowerPC assembly
    CALLEE
REGISTER USAGE SAVE
Integer Registers
r01 Used in prolog/epilog NO
r1 Stack pointer YES
r2 TOC pointer (reserved) YES
r3 1st para/return val NO
r4-r10 3-8th para NO
r11 Environment pointer NO
r12 Used by global linkage NO
r13 reserved system thread ID N/A
r14-31 Global int registers YES
Floating Point Registers
f0 Scratch reg NO
f1-13 1-13th fp para NO
f14-f31 Global fp regs YES
Special Registers
LR Link register YES
CTR Count register NO
XER Fixed pt exception NO
FPSCR fp status & ctrl NO
CR0-CR7 Condition reg fields, each 4 bits wide 2, 3, 4 : YES
Vector Registers
v0-v1 scratch regs NO
v2-v13 vec para regs NO
v14-v19 scratch regs NO
v20-v31 global vregs YES
vrsave (32 bits) YES
.


Clint Whaley 2012-07-10